Bare die assembly — mounting a semiconductor chip directly onto a PCB without the protection of a package — is increasingly common in applications where size, weight, and electrical path length are critical. Consumer electronics, wearables, medical devices, and high-frequency communication modules all use bare die approaches to achieve performance and form factor targets that packaged components cannot reach. But a bare die on a PCB is a vulnerable structure: the chip itself is fragile, its wire bonds are exposed, and the entire assembly is subject to the mechanical and environmental stresses of its end-use application. Glob-top encapsulation with one-part epoxy is the standard approach for protecting these assemblies — and understanding how it works and what it requires helps engineers implement it correctly.
What Glob-Top Encapsulation Is
Glob-top refers to a dome of cured adhesive applied over a bare die and its wire bonds after the chip has been bonded to the PCB substrate. The encapsulant covers the chip surface, the bond wires, and the bond pads on the die and substrate, providing mechanical protection against impact and vibration, electrical insulation, and environmental protection against moisture and contamination.
The term comes from the characteristic dome shape — a glob of adhesive deposited with enough volume to cover the entire die and wire bond arc. Gel-like or thixotropic formulations are typically used so the deposited material holds its shape during cure rather than flowing off the die edges.
One-part epoxy is widely used for glob-top because it combines the process simplicity of a single-component system with the protective performance characteristics — high crosslink density, good moisture resistance, and controlled cure shrinkage — that bare die applications require.
Formulation Requirements for Glob-Top Applications
The adhesive formulation for glob-top must address several simultaneous requirements.
Viscosity and thixotropy. The material must flow onto the die and wire bonds during dispense but not continue to flow after dispensing. A thixotropic formulation — one with a high ratio of rest viscosity to shear viscosity — flows readily under the shear stress of dispensing, then recovers to a higher viscosity at rest that holds the dome shape. Typical glob-top viscosities at rest are in the range of 50,000 to 200,000 mPa·s; at dispensing shear rates, effective viscosity is much lower.
CTE and stress. Cured glob-top epoxy contracts during cooling from the cure temperature, generating stress on the die and wire bonds. The CTE of the encapsulant (typically 40 to 70 ppm/°C for unfilled or lightly filled epoxy) is much higher than silicon (3 ppm/°C). This mismatch is the primary source of mechanical stress on the die during thermal cycling. Low-modulus or toughened formulations are preferred for fine wire or fragile bond structures; the reduced stiffness of the encapsulant limits the stress transferred to the wire bonds.
Ionic purity. Semiconductor device reliability is sensitive to ionic contamination in adjacent materials. Chloride ions and other mobile ions in encapsulant materials can migrate under electrical bias and cause electrochemical corrosion of bond pads and metal traces. Glob-top formulations used on semiconductor devices are characterized for ionic content, and semiconductor-grade epoxies typically specify chloride levels below 1 ppm. This is a significant formulation constraint; not all one-part epoxy products are suitable for direct die contact.
Cure shrinkage. All curing polymers shrink as the network forms. In glob-top applications, cure shrinkage creates tensile stress on the encapsulant-die interface at the center of the dome and compressive stress at the edges. Controlled cure schedules — slow ramp, moderate cure temperature — reduce the rate of shrinkage and allow stress to relax through viscoelastic flow during the cure. Low-shrinkage formulations, achieved through specific resin selection or filler loading, also address this.
If you’re qualifying a glob-top formulation for a bare die application and need guidance on ionic purity requirements or CTE mismatch testing, Email Us — Incure can provide technical support and characterization data.
Dispense Process for Glob-Top
Glob-top dispensing requires precise volume control and tip placement to cover the die and wire bonds without overflowing onto adjacent components or contaminating areas intended for electrical contact. Automated dispensing systems — typically needle-in-air (NIA) or jet dispensing — provide the control needed for production quantities.
For dies with wire bonds, the dispense tip path must deposit material that covers the highest wire bond arc without trapping air voids beneath the wire loops. Low-viscosity formulations can be deposited at the die edge and allowed to flow under the wire loops by capillary action before the dome fills. For high-arc wire bonds or wide die geometries, dispense from a perimeter approach — depositing the encapsulant in a ring around the die edge and allowing it to flow toward center — can improve void-free coverage.
Volume control is critical. Underfill (insufficient volume) leaves wire bonds exposed at the periphery. Overfill results in material flowing beyond the intended area, potentially contaminating adjacent pads or components. For production qualification, deposit weight verification by scale provides a non-destructive in-process check.
Cure Process and Profile
One-part epoxy glob-top is cured in a convection oven. The standard cure profile for semiconductor applications typically includes a low-temperature staging step (60°C to 80°C for 20 to 30 minutes) before the full cure temperature to allow the material to flow and wet all surfaces before gelation. This staged approach improves coverage and reduces void formation around wire bond loops.
Full cure temperature for semiconductor-grade one-part glob-top formulations is typically 125°C to 150°C for 30 to 60 minutes. The cure temperature must be within the thermal tolerance of the PCB substrate, any other components on the board, and the die attach adhesive beneath the chip.
Cure shrinkage and cool-down stress can be managed through controlled cooling rate after the cure hold. Slow cooling — 2°C to 3°C per minute from cure temperature to below 60°C — allows stress to relax through viscoelastic flow in the partially cooled material, reducing the final residual stress state compared to a rapid quench.
Post-Cure Inspection
After cure, glob-top assemblies are inspected for coverage (all wire bonds encapsulated), geometry (dome profile within acceptable height and diameter range), surface quality (no voids, inclusions, or cracks), and electrical function (continuity and isolation at the relevant nodes). For high-reliability applications, cross-sectioning and microscopy of sample units from each lot confirms void-free coverage and correct wire bond geometry within the dome.
Long-term reliability testing — thermal cycling, humidity-bias aging, mechanical shock — is conducted on qualification samples to characterize encapsulant performance under representative service conditions before production release.
Contact Our Team to discuss glob-top encapsulation formulation selection and process qualification for your bare die application.
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